1. Field of the Invention
The present invention relates to an active matrix display device used in liquid crystal display device and the like, and its driving method.
2. Description of the Related Art
FIG. 1 shows an example of construction of active matrix liquid crystal display device having pixels of n rows and m columns in the prior art. A basic constitution of such prior art is disclosed, for example, in pages 152-154 of JAPAN DISPLAY '89. In the prior art shown in FIG. 1, additional capacitances are connected in parallel with the pixel (electrically equivalent to capacitance). In the drawing, numeral 603 is a switching element composed of a thin film transistor (hereinafter called TFT), which is turned on or off by a gate signal sent from a gate driving circuit 609 through a gate bus line 601. Numeral 608 denotes a source driving circuit, which is composed of analog switches 610 for sampling video signals sent from a video signal line 612 and writing into source bus line capacities 607, and a shift register 613 for sending the sampling control signal to gate electrode 611 of the analog switch.
A video signal supplied to the source bus line 602 through the source driving circuit 608 is written into a pixel 606, which is equivalent to the capacitance being composed of a liquid crystal held between a pixel electrode disposed on each pixel and a counter electrode on a counter substrate, and into an additional capacitance 605 for compensating the capacitance of the pixel being connected in parallel with pixel 606 when the potential of the gate pulse line 601 becomes high and the pixel TFT 603 is turned off.
One terminal of this additional capacitance 605 is connected to the pixel electrode, and the other is connected to a grounded additional capacitance line 604. The written signal is held in the OFF state of the TFT 603, but by installing the additional capacitance 605, the holding characteristic of this signal may be improved, or the fluctuations of characteristics due to anisotropy of dielectric constant of the liquid crystal may be alleviated.
FIG. 2 and FIG. 3 show examples of driving waveforms of conventional active matrix liquid crystal display device. FIG. 2 depicts signal waveforms delivered from the gate driving circuit 609 into individual gate bus lines X.sub.1, X.sub.2 - - - X.sub.n during one field. The signal "H" corresponds to the ON state of the pixel TFT 603, and "L" to the OFF state. Thus, in the sequence of the gate bus lines X.sub.1, X.sub.2 - - - X.sub.n, the signal "H" is issued, and the pulse width of the output is nearly equal to the horizontal scanning time (known as "1H"). In this period of "1H", for on/off control of the analog switch 610 in the source driving circuit 608, control signals having the waveform as shown in FIG. 3 are applied to the gate electrode of each analog switch 610.
The diagram shows the waveform when the i-th and i+1-th gate bus lines X.sub.i, X.sub.i+1, are ON, as is similar in other cases. In this example, incidentally, the timing of change of the potential of the i-th gate bus line X.sub.i from "H" to "L" coincides with the timing of change of the potential of the (i+1)-th gate bus line X.sub.i+1 from "L" to "H". In this period of 1H, the m analog switches 610 are sequentially turned on, and the video signals are written into the source bus lines 602.
A finite time t1 must be provided from the moment of the previous stage gate bus line X.sub.i-1 becoming L until the first analog switch 610 is turned on by the control signal Y.sub.1. This is because the resistance of the gate bus line 601 is finite and the potential change is delayed. That is, if a video signal is written in the source bus line 602 by turning on the analog switch 610 by control signal Y.sub.1 before the previous stage gate bus line X.sub.i-1 becomes sufficiently "L", since the resistance of the pixel TFT 603 connected to the previous stage gate bus line X.sub.i-1 is not sufficiently increased, the signal written in the previous stage pixel 606 may be disturbed by the video signal corresponding to the pixel 606 of this stage.
As a result, the display of the previous stage pixel is a mixture of the video signal for the previous stage and the video signal for the next stage, and the resolution is lowered. Therefore, the time t1 should be set sufficiently long in order to decrease the effect of delay time of the gate bus line 601. Likewise, a finite time t2 must be provided from the moment of turning on the final analog switch 610 by control signal Y.sub.m until the potential of the gate bus line 601 is lowered to "L". This is because a finite time is required for writing signals into the pixel 606 and additional capacitance 605 through the pixel TFT 603, and discharging the written charge through the additional capacitance wiring 604, and the video signal cannot be sufficiently written into the pixel 606 unless a sufficiently long time is taken.
It was thus a feature of the conventional active matrix liquid crystal display device that only one source bus line 602 was connected to each pixel 606. In the driving method of the conventional active matrix display device, it was a feature that the ON time of each gate bus line 601 did not exceed the horizontal scanning time.
In the conventional active matrix type liquid crystal display device, the greater the number of pixels, the higher becomes the resolution, and a favorable display quality may be obtained. However, as the number of pixels increases, several technical problems occur. For example, delays of the gate bus line and additional capacitance common line are noted. The line resistance and additional capacitance are both proportional to the number of pixels in the horizontal direction. Therefore, the time constant of delay of these lines is nearly proportional to the square of the number of pixels in the horizontal direction. Hence, as the number of pixels increases, the line delay increases noticeably. Accordingly, the times t1, t2 must be extended.
In the display device having a great number of pixels, however, the horizontal scanning time becomes shorter. As a result, sufficiently long duration cannot be taken for times t1, t2 in order to decrease the effect of delay, which results in an increase of the effect of delay. When such effect of line delay increases, deterioration of display quality or the like may occur at one end of the screen. It is hitherto very difficult to improve the resolution without sacrificing the display quality. Besides, along with the increase of the number of pixels, the signal writing time for one pixel becomes shorter in proportion. Hence, it is also a problem that a faster writing speed of signal is required.
The present inventors have previously disclosed some improved inventions in the Japanese Patent Publications No. 163529/1991 and No. 163530/1991, with the purpose of reducing the effect of signal delay on display quality. In these inventions, by lowering the resistance of the additional capacitance line, the signal writing speed is enhanced.
It is similarly an object of the present invention to reduce the effect of signal delay on display quality. In the invention, however, this object is achieved by completely different means for substantially extending the writing time.
To achieve the above object, the invention presents an active matrix display device comprising pixels in two-dimensional arrangement, and having each pixel provided with a driving element for driving the pixel, wherein a plurality of signal lines for feeding signals to driving elements of pixels in each column are formed at each column, so that the successive rows of driving elements of the pixels in a column are connected to and successive ones driven by any the plurality of signal lines.
In the invention, the pixel driving element of each row is arranged to be driven by a column signal from a signal line different from the driving element of the adjacent row.
Also in the invention, the pixel driving element in each row comprises means for successively generating signals and for supplying the signals to the pixel driving element of each row to make active during the scanning time which is a product of one horizontal scanning time and a number of signal lines formed in each column.
In the invention, the pixel driving elements are constructed as thin film transistors. In the invention, the signal provided for each column driving element is kept by capacity of signal line for the moment.
The invention also presents a driving method of an active matrix display device for driving a matrix display device, which is composed of pixels in two-dimensional arrangement, and driving elements disposed at each pixel for driving by means of selection signal for each row and video signal for each row wherein
a plurality of signal lines for feeding signals to driving elements of pixels in each column are formed, and the successive rows of driving elements of pixels in a column are connected to and driven by successive ones of the plurality signal lines, so that the scanning time of the selection signal, when the driving element for driving pixels of each row is active, may be a product of one horizontal scanning time and a number of signal lines formed in each column.
In the invention, the driving elements of pixels of each column are constructed so that the driving element of pixels of each adjacent row may be driven by a video signal from a different signal line.
Also in the invention, the driving elements of pixels of each row are provided with a selection signal sequentially for making active only during the scanning time, while deviating the section signal by a predetermined time.
In the invention, moreover, the driving elements of pixels of each row are provided with a video signal through one of the signal lines forming in a plurality at each column, after each row is made active by a selection signal and before the next row is made active by a selection signal.
According to the above constitution, if ON signals are simultaneously sent to a plurality of adjacent gate bus lines, video signals to be written into adjacent pixels across gate bus lines will not be mixed mutually. Therefore, the output width of the ON signal sent out to each gate bus line may be set longer than the time assigned for one gate bus line. As a result, the time for decreasing the delay effect of signal line may be extended, and the effect of line delay may be decreased if the number of pixels is increased, so that the display quality may be enhanced.
The invention is thus constructed so that the sum t1+t2+t3 can be extended to 2H and so forth, where the time t1 is from the moment when the gate bus line becomes high until reading of video signal to the first source bus line begins, the time t2 is from the moment when the video signal is read out to the final source bus line until the output of the gate bus line falls, and the time t3 is required to read out the video signal for pixel array if one row. In the conventional driving wave form, the sum is one horizontal time (1H). Therefore, the duration of t1, t2, t3 can be extended, and the effect of the line delay is lessened accordingly, so it is possible to present a display device, which is excellent in writing characteristics of the pixel transistor.